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== Writing code == Narrator: "Without an obvious board issue, I decided to research how the chip outputs video" A glossy blue slide shows the text "Investigating Geode video output" Narrator: "So I opened the datasheet and started looking for anything useful." The datasheet cover page is shown. An 'AMD Geode' logo is shown as well as the title "AMD Geode™ LX Processors Data Book". The datasheet is dated February 2009. Narrator: "I first looked at the at the video processor diagnostic register." A table titled "MSR_DIAG_VP Bit Descriptions" is shown. It has these fields: * RSVD: Reserved * CM: 32-Bit CRC Mode. Selects 32-bit CRC generation * NDM: New Dither Mode. Selects either the legacy dither mode, or new dither mode * SM: Sim Mode. This field is used to put the VP in modes to aid verification * DVAL: DAC Test Value. 8-bit data value to drive to CRT DAC when selected by bit 19 * D: DAC Test Value Select. Selects which data stream is sent to CRT DAC during CRT DAC test mode * RSVD: Reserved. Reserved for test purposes. Set to 000 for normal operation * SP: Spares. Read/write, no function Narrator: "I found some interesting fields that can be used to test the video processor DAC." Three fields are shown in more detail. I will quote from the datasheet here:<blockquote>Bits 27 to 20: DAC Test Value 8-bit data value to drive to CRT DAC when selected by bit 19. Duplicate copies of DAC Test Value are driven on DAC RGB. * crt_dac_r[7:0] = DAC Test Value[7:0] ([27:20] is this register) * crt_dac_g[7:0] = DAC Test Value[7:0] ([27:20] is this register) * crt_dac_b[7:0] = DAC Test Value[7:0] ([27:20] is this register) To enable DAC Test Value to be driven to CRT DAC: * (DAC Test Value Select must = 0) AND * ((VTM[6] = 0 AND MBD_MSR_DIAG[18:16] = 101h) OR * (VTM[6] = 1 AND VTM[3:0] = 0001h) Bit 19: DAC Test Value Select Selects which data stream is sent to CRT DAC during CRT DAC test mode. * <nowiki>0: 24-bit data to CRT DAC = {3{DAC Test Value[27:20]}} (3 time repeated 8-bit value).</nowiki> * 1: 24-bit data to CRT DAC = gfx_data[23:0] (raw input from Display Controller). Bits 18:16: RSVD Reserved. Reserved for test purposes. Set to 000 for normal operation.</blockquote>Narrator: "It looks complicated, but it's quite straight forward. Here's how to use it:" The text "How to use DAC test mode:" is shown on screen. Narrator: "Don't. Save yourself from this nightmare." The single word "Don't" is shown in the center of the screen. Narrator: "First: The MBD_MSR_DIAG register doesn't exist." The three fields are shown again, with the "MBD_MSR_DIAG" register circled. Narrator: "I googled it and got three results" Top of a google results page is shown. It says there are about 3 results. Google helpfully says "It looks like there aren't many great matches for your search" The text "Google returns 3 results:" is shown on screen. Narrator: "The top one is my website!" Three Google results are shown: * A link to [[AMD Geode/Troubleshooting]] * A link to https://www.linuxconsulting.ro/xorg-drivers/source/xf86-video-nsc-imedia/src/cim/cim_regs.h * A link to UserManual.wiki: [https://usermanual.wiki/Amd/AmdGeodeLx80009WUsersManual507577.1469383922/help Amd Geode Lx 800 0 9W Users Manual Processor Data Book] The text "The top result is my website!" is shown on screen. Narrator: "It's could be a typo for GLD_MSR_DIAG." The GLD Diagnostic MSR register is shown, named GLD_MSR_DIAG. It has a note: "This register is reversed for internal use by AMD and should not be written to." The text "Maybe it meant GLD_MSR_DIAG?" is shown on screen. Narrator: "But that register is reserved and not for use" The note about it being reserved is circled. The text "But it's reserved and not for use?" Narrator: "Maybe it's a typo for the reserved test field I saw earlier?" The three diagnostic fields from earlier are shown. The RSVD field is circled. The text "Perhaps it meant the RSVD field?" is shown on screen. Narrator: "The bit fields line up, both reference bits 18 to 16." The numbers "18:16" are circled twice, with an arrow pointed between them. The first instance is in the text "MBD_MSR_DIAG[18:16]". The second instance is the bits for the RSVD field. The text "The bit fields both match" is shown on screen. Narrator: "Setting these registers use both MSRs and memory mapping" The VP Diagnostic MSR (MSG_DIAG_VP) and Video Processor Test Mode (VTM) registers are shown. MSG_DIAG_VP has an MSD address of 48002010h. VTM has a VP Memory Offset of 130h. The text "They use a mix of MSRs and memory mapping?" is shown on screen. Narrator: "The documentation on how to use these is fairly confusing" Excerpts from the GeodeLink datasheet section are shown, including Table 4-2. MSR Mapping and the Memory and I/O Mapping section. Both have a lot of complicated wording and require further context to understand. The text "Using those seems complicated..." is shown on screen. Narrator: "So I gave up and just modified the Linux driver to set registers for me." The following source code is shown: /* Enable test mode? */ #define VP_DIAG_MSR 0x48002011 u64 diag_val = 0; u64 vtm_val = 0; diag_val |= (128 << 27); /* DVAL = 128 */ /* diag_val D is already 0 */ diag_val |= (0x5 << 18); /* RSVD = 0b101 */ /* VTM[6] is already 0 */ wrmsrl(VP_DIAG_MSR, diag_val); write_vp(par, VP_VTM, dcfg); The text "I just edited the Linux driver:" is shown on screen. Narrator: "...and it just made the screen go black." The text "Test mode just made the screen go black" is shown on screen. Narrator: "So what else is there to check?" The text "What next?" appears on the screen" Narrator: "I found a register that lets you use an external DAC VREF" The DCFG register is shown. The following field is highlighted:<blockquote>Select DAC VREF. Allows use of an external voltage reference for CRT DAC. * 0: Disable external VREF. * 1: Use external VREF.</blockquote>The text "Maybe using another DAC VREF would help?" is shown on the screen. Narrator: "Changing it didn't help." The text "It did nothing" appears on the screen. Narrator: "The DACPWRDN register reports if its powered down." The MISC register is partially shown. The following fields are shown:<blockquote>Bits 63 to 13: RSVD (RO) Reserved (Read Only). Reads back as 0. Bit 12: SP Spare. Read/write; no function. Bit 11: APWRDN Analog Interface Power Down. Enables power down of the analog section of the internal CRT DAC. * 0: Normal. * 1: Power down. Bit 10: DACPWRDN DAC Power Down. Enables power down of the digital section of the internal CRT DAC. For this bit to take effect: VP Memory Offset 130h[6] must be = 1 or MSR Address 48000010h[18:16] must not equal 101. * 0: Normal. * 1: Power down. </blockquote>The text "Maybe the DAC is powered down?" is shown on screen. Narrator: "But I confirmed these were set properly" The text "Nope, these are set fine" appears on the screen. Narrator: "I found the GLCP_DAC register" The GLCP_DAC register is partially shown. The following fields are shown:<blockquote>Bits 64 to 14: RSVD Reserved. Bit 13: SB (RO) Status Blue (Read only). A logic level 1 means the Blue DAC output is above 0.35V. Bit 12: SG (RO) Status Green (Read only). A logic level 1 means the Green DAC output is above 0.35V. Bit 11: SR (RO) Status Red (Read only). A logic level 1 means the Red DAC output is above 0.35V. Bit 10: INREFEN Internal Reference Enable. Internal reference enable to the DAC. Bit 9: OL Output Level. * 0: RGB * 1: TV - for testing only, analog TV out is not supported). Bits 8 to 6: AB Adjust for Blue DAC. * 000: 0%. * 011: 7.5% * 100: -10%. * 111: -2.5%. </blockquote>The text "I found the GLCP_DAC register" is shown on screen. Narrator: "It has fields showing the DAC output voltage" The status registers are circled. The text "It reports on DAC output voltages" is shown on screen. Narrator: "It correctly reports the output as being low voltage" The text "It reported low voltage correctly" appears on screen. Narrator: "Well, that wasn't too helpful." The text "That was unhelpful" is the only thing shown on the screen.
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