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== The birth of multi-byte NOP == In 2006 Intel released an [https://ragestorm.net/downloads/25366719.pdf updated IA-32 Intel Architecture Software Developer's Manual]. In addition to the standard one byte NOP op code, the multi-byte opcode was documented. This NOP could be from 2 to 9 bytes long, much longer than a single byte NOP. This is a pretty useful instruction for aligning code and data in memory. The only thing weird about this instruction is that it was marked as available on Pentium Pro and newer machines despite being documented in 2006. It turned out that Intel had recycled one of their hinting NOPs (0F 1F) as a new instruction. Someone pointed this out on the Intel forum in the thread [https://community.intel.com/t5/Software-Archive/Multi-byte-NOP-opcode-made-official/td-p/932580 Multi-byte NOP opcode made official]. They had tested and verified the feature and even pointed out that it works on AMD processors despite this instruction not being documented anywhere. They asked a few hard hitting questions to Intel: * Why was this opcode secret? * Why does it work on AMD CPUs? * Why does AMD recommend an opcode of 66 66 66 90 for multi-byte NOPs? Intel got back to them with a 'this information is Intel Confidential and would require an NDA to discuss' reply. NOPs are definitely serious business. I'm going to just go out and guess that AMD recommended the 66 90 opcode series because their CPUs optimized it and it worked on older machines. While with Intel their solution seems to be to recycle their trash. In 2007 Symantec wrote a blog post [https://web.archive.org/web/20070221081630/http://www.symantec.com/enterprise/security_response/weblog/2007/02/x86_fetchdecode_anomalies.html x86 Fetch-Decode Anomalies] showing that Intel's hinting NOP opcode they assigned to the multi-byte NOP actually will attempt to fetch memory (and even page fault) if you instruct it to. This isn't a problem in practice, but it gives more evidence this opcode isn't strictly a NOP.
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